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125 lines
7.2 KiB
125 lines
7.2 KiB
# Paradigms of Parallelism
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Author: Shenggui Li, Siqi Mai
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## Introduction
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With the development of deep learning, there is an increasing demand for parallel training. This is because that model
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and datasets are getting larger and larger and training time becomes a nightmare if we stick to single-GPU training. In
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this section, we will provide a brief overview of existing methods to parallelize training. If you wish to add on to this
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post, you may create a discussion in the [GitHub forum](https://github.com/hpcaitech/ColossalAI/discussions).
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## Data Parallel
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Data parallel is the most common form of parallelism due to its simplicity. In data parallel training, the dataset is split
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into several shards, each shard is allocated to a device. This is equivalent to parallelize the training process along the
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batch dimension. Each device will hold a full copy of the model replica and trains on the dataset shard allocated. After
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back-propagation, the gradients of the model will be all-reduced so that the model parameters on different devices can stay
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synchronized.
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<figure style={{textAlign: "center"}}>
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<img src="https://s2.loli.net/2022/01/28/WSAensMqjwHdOlR.png"/>
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<figcaption>Data parallel illustration</figcaption>
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</figure>
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## Model Parallel
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In data parallel training, one prominent feature is that each GPU holds a copy of the whole model weights. This brings
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redundancy issue. Another paradigm of parallelism is model parallelism, where model is split and distributed over an array
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of devices. There are generally two types of parallelism: tensor parallelism and pipeline parallelism. Tensor parallelism is
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to parallelize computation within an operation such as matrix-matrix multiplication. Pipeline parallelism is to parallelize
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computation between layers. Thus, from another point of view, tensor parallelism can be seen as intra-layer parallelism and
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pipeline parallelism can be seen as inter-layer parallelism.
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### Tensor Parallel
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Tensor parallel training is to split a tensor into `N` chunks along a specific dimension and each device only holds `1/N`
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of the whole tensor while not affecting the correctness of the computation graph. This requires additional communication
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to make sure that the result is correct.
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Taking a general matrix multiplication as an example, let's say we have C = AB. We can split B along the column dimension
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into `[B0 B1 B2 ... Bn]` and each device holds a column. We then multiply `A` with each column in `B` on each device, we
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will get `[AB0 AB1 AB2 ... ABn]`. At this moment, each device still holds partial results, e.g. device rank 0 holds `AB0`.
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To make sure the result is correct, we need to all-gather the partial result and concatenate the tensor along the column
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dimension. In this way, we are able to distribute the tensor over devices while making sure the computation flow remains
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correct.
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<figure style={{textAlign: "center"}}>
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<img src="https://s2.loli.net/2022/01/28/2ZwyPDvXANW4tMG.png"/>
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<figcaption>Tensor parallel illustration</figcaption>
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</figure>
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In Colossal-AI, we provide an array of tensor parallelism methods, namely 1D, 2D, 2.5D and 3D tensor parallelism. We will
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talk about them in detail in `advanced tutorials`.
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Related paper:
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- [GShard: Scaling Giant Models with Conditional Computation and Automatic Sharding](https://arxiv.org/abs/2006.16668)
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- [Megatron-LM: Training Multi-Billion Parameter Language Models Using Model Parallelism](https://arxiv.org/abs/1909.08053)
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- [An Efficient 2D Method for Training Super-Large Deep Learning Models](https://arxiv.org/abs/2104.05343)
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- [2.5-dimensional distributed model training](https://arxiv.org/abs/2105.14500)
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- [Maximizing Parallelism in Distributed Training for Huge Neural Networks](https://arxiv.org/abs/2105.14450)
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### Pipeline Parallel
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Pipeline parallelism is generally easy to understand. If you recall your computer architecture course, this indeed exists
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in the CPU design.
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<figure style={{textAlign: "center"}}>
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<img src="https://s2.loli.net/2022/01/28/at3eDv7kKBusxbd.png"/>
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<figcaption>Pipeline parallel illustration</figcaption>
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</figure>
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The core idea of pipeline parallelism is that the model is split by layer into several chunks, each chunk is
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given to a device. During the forward pass, each device passes the intermediate activation to the next stage. During the backward pass,
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each device passes the gradient of the input tensor back to the previous pipeline stage. This allows devices to compute simultaneously,
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and increases the training throughput. One drawback of pipeline parallel training is that there will be some bubble time where
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some devices are engaged in computation, leading to waste of computational resources.
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<figure style={{textAlign: "center"}}>
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<img src="https://s2.loli.net/2022/01/28/sDNq51PS3Gxbw7F.png"/>
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<figcaption>Source: <a href="https://arxiv.org/abs/1811.06965">GPipe</a></figcaption>
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</figure>
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Related paper:
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- [PipeDream: Fast and Efficient Pipeline Parallel DNN Training](https://arxiv.org/abs/1806.03377)
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- [GPipe: Efficient Training of Giant Neural Networks using Pipeline Parallelism](https://arxiv.org/abs/1811.06965)
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- [Megatron-LM: Training Multi-Billion Parameter Language Models Using Model Parallelism](https://arxiv.org/abs/1909.08053)
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- [Chimera: Efficiently Training Large-Scale Neural Networks with Bidirectional Pipelines](https://arxiv.org/abs/2107.06925)
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## Optimizer-Level Parallel
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Another paradigm works at the optimizer level, and the current most famous method of this paradigm is ZeRO which stands
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for [zero redundancy optimizer](https://arxiv.org/abs/1910.02054). ZeRO works at three levels to remove memory redundancy
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(fp16 training is required for ZeRO):
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- Level 1: The optimizer states are partitioned across the processes
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- Level 2: The reduced 32-bit gradients for updating the model weights are also partitioned such that each process
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only stores the gradients corresponding to its partition of the optimizer states.
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- Level 3: The 16-bit model parameters are partitioned across the processes
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Related paper:
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- [ZeRO: Memory Optimizations Toward Training Trillion Parameter Models](https://arxiv.org/abs/1910.02054)
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## Parallelism on Heterogeneous System
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The methods mentioned above generally require a large number of GPU to train a large model. However, it is often neglected
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that CPU has a much larger memory compared to GPU. On a typical server, CPU can easily have several hundred GB RAM while each GPU
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typically only has 16 or 32 GB RAM. This prompts the community to think why CPU memory is not utilized for distributed training.
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Recent advances rely on CPU and even NVMe disk to train large models. The main idea is to offload tensors back to CPU memory
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or NVMe disk when they are not used. By using the heterogeneous system architecture, it is possible to accommodate a huge
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model on a single machine.
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<figure style={{textAlign: "center"}}>
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<img src="https://s2.loli.net/2022/01/28/qLHD5lk97hXQdbv.png"/>
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<figcaption>Heterogenous system illustration</figcaption>
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</figure>
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Related paper:
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- [ZeRO-Offload: Democratizing Billion-Scale Model Training](https://arxiv.org/abs/2101.06840)
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- [ZeRO-Infinity: Breaking the GPU Memory Wall for Extreme Scale Deep Learning](https://arxiv.org/abs/2104.07857)
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- [PatrickStar: Parallel Training of Pre-trained Models via Chunk-based Memory Management](https://arxiv.org/abs/2108.05818)
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