98 lines
1.8 KiB
Plaintext
98 lines
1.8 KiB
Plaintext
{2}// Examples drawn from https://verilogams.com/refman/basics/index.html
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{0}
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{2}// SCE_V_DEFAULT {0}
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{0}
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{1}/*
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* SCE_V_COMMENT {1}
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*/{0}
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{2}// SCE_V_COMMENTLINE {2}
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// multiple
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// comment lines
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// are folded
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{0}
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{2}//{ explicit folds
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// are folded,
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//} too
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{0}
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{3}//! SCE_V_COMMENTLINEBANG {3}
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//! multiple
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//! bang comments
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//! are folded
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{0}
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{2}// SCE_V_NUMBER {4}
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{4}1'b0{0}
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{4}8'hx{0}
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{4}8'hfffx{0}
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{4}12'hfx{0}
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{4}64'o0{0}
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{4}0x7f{0}
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{4}0o23{0}
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{4}0b1011{0}
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{4}42_839{0}
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{4}0.1{0}
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{4}1.3u{0}
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{4}5.46K{0}
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{4}1.2E12{0}
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{4}1.30e{10}-{4}2{0}
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{4}236.123_763e{10}-{4}12{0}
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{2}// SCE_V_WORD {5}
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{5}always{0}
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{2}// SCE_V_STRING {6}
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{6}"\tsome\ttext\r\n"{0}
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{2}// SCE_V_WORD2 {7}
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{7}special{0}
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{2}// SCE_V_WORD3 {8}
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{8}$async$and$array{0}
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{2}// SCE_V_PREPROCESSOR {9}
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{9}`define{0} {11}__VAMS_ENABLE__{0}
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{9}`ifdef{0} {11}__VAMS_ENABLE__{0}
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{5}parameter{0} {5}integer{0} {11}del{0} {10}={0} {4}1{0} {11}from{0} {10}[{4}1{10}:{4}100{10}];{0}
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{9}`else{64}
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{69}parameter{64} {75}del{64} {74}={64} {68}1{74};{64}
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{9}`endif{0}
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{2}// SCE_V_OPERATOR {10}
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{10}+-/=!@#%^&*()[]{}<|>~{0}
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{2}// SCE_V_IDENTIFIER {11}
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{11}q{0}
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{11}x$z{0}
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{11}\my_var{0}
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{11}\/x1/n1{0}
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{11}\\x1\n1{0}
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{11}\{a,b}{0}
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{11}\V(p,n){0}
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{2}// SCE_V_STRINGEOL {12}
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{12}"\n
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{0}
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{2}// SCE_V_USER {19}
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{19}my_var{0}
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{2}// SCE_V_COMMENT_WORD {20}
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// {20}TODO{2} write a comment
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{0}
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{5}module{0} {11}mod{10}({11}clk{10},{0} {11}q{10},{0} {11}reset{10}){0} {2}// folded when fold.verilog.flags=1
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// SCE_V_INPUT {21}
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{0} {21}input{0} {21}clk{10};{0}
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{2}// SCE_V_OUTPUT {22}
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{0} {22}output{0} {22}q{10};{0}
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{2}// SCE_V_INOUT {23}
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{0} {23}inout{0} {23}reset{10};{0}
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{5}endmodule{0}
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{2}// SCE_V_PORT_CONNECT {24}
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{11}mod{0} {11}m1{10}({0}
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{10}.{24}clk{10}({11}clk{10}),{0}
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{10}.{24}q{10}({11}q{10}),{0}
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{10}.{24}reset{10}({11}reset{10}){0}
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{10});{0}
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