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354 lines
13 KiB
354 lines
13 KiB
// modified from |
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// https://github.com/NVIDIA/apex/blob/master/csrc/multi_tensor_lamb.cu |
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#include <ATen/ATen.h> |
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#include <ATen/AccumulateType.h> |
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#include <ATen/cuda/CUDAContext.h> |
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#include <ATen/cuda/Exceptions.h> |
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// Another possibility: |
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// #include <torch/all.h> |
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#include <assert.h> |
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#include "multi_tensor_apply.cuh" |
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#include "type_shim.h" |
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#define BLOCK_SIZE 512 |
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#define ILP 4 |
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template <typename T> |
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__device__ __forceinline__ bool is_aligned(T *p) { |
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return ((uint64_t)p) % (ILP * sizeof(T)) == 0; |
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} |
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template <typename T> |
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__device__ __forceinline__ void load_store(T *dst, T *src, int dst_offset, |
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int src_offset) { |
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typedef |
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typename std::aligned_storage<ILP * sizeof(T), ILP * alignof(T)>::type LT; |
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((LT *)dst)[dst_offset] = ((LT *)src)[src_offset]; |
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} |
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typedef enum { |
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MOMENT_MODE_0 = 0, // L2 regularization mode |
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MOMENT_MODE_1 = 1 // Decoupled weight decay mode |
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} adamMode_t; |
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std::tuple<at::Tensor, at::Tensor> multi_tensor_l2norm_cuda( |
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int chunk_size, at::Tensor noop_flag, |
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std::vector<std::vector<at::Tensor>> tensor_lists, |
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at::optional<bool> per_tensor_python); |
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using MATH_T = float; |
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template <typename T> |
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struct LAMBStage1Functor { |
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__device__ __forceinline__ void operator()( |
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int chunk_size, volatile int *noop_gmem, TensorListMetadata<4> &tl, |
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const float beta1, const float beta2, const float beta3, |
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const float beta1_correction, const float beta2_correction, |
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const float epsilon, adamMode_t mode, const float decay, |
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const float *global_grad_norm, const float max_global_grad_norm) { |
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// I'd like this kernel to propagate infs/nans. |
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// if(*noop_gmem == 1) |
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// return; |
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int tensor_loc = tl.block_to_tensor[blockIdx.x]; |
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int chunk_idx = tl.block_to_chunk[blockIdx.x]; |
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int n = tl.sizes[tensor_loc]; |
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float clipped_global_grad_norm = |
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(*global_grad_norm) > max_global_grad_norm |
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? (*global_grad_norm) / max_global_grad_norm |
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: 1.0f; |
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T *g = (T *)tl.addresses[0][tensor_loc]; |
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g += chunk_idx * chunk_size; |
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T *p = (T *)tl.addresses[1][tensor_loc]; |
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p += chunk_idx * chunk_size; |
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T *m = (T *)tl.addresses[2][tensor_loc]; |
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m += chunk_idx * chunk_size; |
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T *v = (T *)tl.addresses[3][tensor_loc]; |
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v += chunk_idx * chunk_size; |
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n -= chunk_idx * chunk_size; |
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MATH_T r_g[ILP]; |
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MATH_T r_p[ILP]; |
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MATH_T r_m[ILP]; |
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MATH_T r_v[ILP]; |
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// to make things simple, we put aligned case in a different code path |
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if (n % ILP == 0 && chunk_size % ILP == 0 && is_aligned(g) && |
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is_aligned(p) && is_aligned(m) && is_aligned(v)) { |
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T l_g[ILP]; |
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T l_p[ILP]; |
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T l_m[ILP]; |
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T l_v[ILP]; |
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for (int i_start = threadIdx.x; |
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i_start * ILP < n && i_start * ILP < chunk_size; |
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i_start += blockDim.x) { |
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// load |
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load_store(l_g, g, 0, i_start); |
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if (decay != 0) load_store(l_p, p, 0, i_start); |
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load_store(l_m, m, 0, i_start); |
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load_store(l_v, v, 0, i_start); |
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// unpack |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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r_g[ii] = l_g[ii]; |
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if (decay == 0) { |
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r_p[ii] = MATH_T(0); |
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} else { |
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r_p[ii] = l_p[ii]; |
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} |
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r_m[ii] = l_m[ii]; |
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r_v[ii] = l_v[ii]; |
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} |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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if (mode == MOMENT_MODE_0) { |
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MATH_T scaled_grad = r_g[ii] / clipped_global_grad_norm; |
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// L2 on scaled grad |
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scaled_grad = scaled_grad + decay * r_p[ii]; |
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r_m[ii] = r_m[ii] * beta1 + beta3 * scaled_grad; |
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r_v[ii] = r_v[ii] * beta2 + (1 - beta2) * scaled_grad * scaled_grad; |
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MATH_T next_m_unbiased = r_m[ii] / beta1_correction; |
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MATH_T next_v_unbiased = r_v[ii] / beta2_correction; |
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MATH_T denom = sqrtf(next_v_unbiased) + epsilon; |
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r_p[ii] = next_m_unbiased / denom; |
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} else { |
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MATH_T scaled_grad = r_g[ii] / clipped_global_grad_norm; |
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r_m[ii] = r_m[ii] * beta1 + beta3 * scaled_grad; |
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r_v[ii] = r_v[ii] * beta2 + (1 - beta2) * scaled_grad * scaled_grad; |
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MATH_T next_m_unbiased = r_m[ii] / beta1_correction; |
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MATH_T next_v_unbiased = r_v[ii] / beta2_correction; |
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MATH_T denom = sqrtf(next_v_unbiased) + epsilon; |
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r_p[ii] = (next_m_unbiased / denom) + (decay * r_p[ii]); |
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} |
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} |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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l_p[ii] = r_p[ii]; |
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l_m[ii] = r_m[ii]; |
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l_v[ii] = r_v[ii]; |
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} |
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// store |
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load_store(g, l_p, i_start, 0); |
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load_store(m, l_m, i_start, 0); |
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load_store(v, l_v, i_start, 0); |
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} |
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} else { |
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// see note in multi_tensor_scale_kernel.cu |
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for (int i_start = 0; i_start < n && i_start < chunk_size; |
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i_start += blockDim.x * ILP) { |
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MATH_T r_g[ILP]; |
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MATH_T r_p[ILP]; |
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MATH_T r_m[ILP]; |
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MATH_T r_v[ILP]; |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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int i = i_start + threadIdx.x + ii * blockDim.x; |
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if (i < n && i < chunk_size) { |
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r_g[ii] = g[i]; |
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// special ?optimization? for lamb stage 1 |
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if (decay == 0) { |
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r_p[ii] = MATH_T(0); |
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} else { |
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r_p[ii] = p[i]; |
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} |
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r_m[ii] = m[i]; |
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r_v[ii] = v[i]; |
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} else { |
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r_g[ii] = MATH_T(0); |
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r_p[ii] = MATH_T(0); |
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r_m[ii] = MATH_T(0); |
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r_v[ii] = MATH_T(0); |
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} |
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} |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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if (mode == MOMENT_MODE_0) { |
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MATH_T scaled_grad = r_g[ii] / clipped_global_grad_norm; |
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// L2 on scaled grad |
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scaled_grad = scaled_grad + decay * r_p[ii]; |
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r_m[ii] = r_m[ii] * beta1 + beta3 * scaled_grad; |
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r_v[ii] = r_v[ii] * beta2 + (1 - beta2) * scaled_grad * scaled_grad; |
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MATH_T next_m_unbiased = r_m[ii] / beta1_correction; |
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MATH_T next_v_unbiased = r_v[ii] / beta2_correction; |
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MATH_T denom = sqrtf(next_v_unbiased) + epsilon; |
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r_p[ii] = next_m_unbiased / denom; |
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} else { |
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MATH_T scaled_grad = r_g[ii] / clipped_global_grad_norm; |
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r_m[ii] = r_m[ii] * beta1 + beta3 * scaled_grad; |
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r_v[ii] = r_v[ii] * beta2 + (1 - beta2) * scaled_grad * scaled_grad; |
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MATH_T next_m_unbiased = r_m[ii] / beta1_correction; |
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MATH_T next_v_unbiased = r_v[ii] / beta2_correction; |
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MATH_T denom = sqrtf(next_v_unbiased) + epsilon; |
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r_p[ii] = (next_m_unbiased / denom) + (decay * r_p[ii]); |
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} |
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} |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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int i = i_start + threadIdx.x + ii * blockDim.x; |
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if (i < n && i < chunk_size) { |
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g[i] = r_p[ii]; |
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m[i] = r_m[ii]; |
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v[i] = r_v[ii]; |
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} |
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} |
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} |
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} |
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} |
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}; |
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// Step 2 reads in 'update' value and per-tensor param_norm and update_norm. |
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// It computes new parameter value. |
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template <typename T> |
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struct LAMBStage2Functor { |
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__device__ __forceinline__ void operator()( |
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int chunk_size, volatile int *noop_gmem, TensorListMetadata<2> &tl, |
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const float *per_tensor_param_norm, const float *per_tensor_update_norm, |
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const float learning_rate, const float decay, bool use_nvlamb) { |
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// I'd like this kernel to propagate infs/nans. |
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// if(*noop_gmem == 1) |
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// return; |
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int tensor_loc = tl.block_to_tensor[blockIdx.x]; |
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int tensor_num = tl.start_tensor_this_launch + tensor_loc; |
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int chunk_idx = tl.block_to_chunk[blockIdx.x]; |
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int n = tl.sizes[tensor_loc]; |
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MATH_T ratio = learning_rate; |
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// nvlamb: apply adaptive learning rate to all parameters |
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// otherwise, only apply to those with non-zero weight decay |
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if (use_nvlamb || (decay != 0.0)) { |
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float param_norm = per_tensor_param_norm[tensor_num]; |
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float update_norm = per_tensor_update_norm[tensor_num]; |
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ratio = (update_norm != 0.0f && param_norm != 0.0f) |
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? learning_rate * (param_norm / update_norm) |
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: learning_rate; |
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} |
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T *update = (T *)tl.addresses[0][tensor_loc]; |
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update += chunk_idx * chunk_size; |
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T *p = (T *)tl.addresses[1][tensor_loc]; |
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p += chunk_idx * chunk_size; |
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n -= chunk_idx * chunk_size; |
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// to make things simple, we put aligned case in a different code path |
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if (n % ILP == 0 && chunk_size % ILP == 0 && is_aligned(p) && |
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is_aligned(update)) { |
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T r_p[ILP]; |
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T r_update[ILP]; |
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for (int i_start = threadIdx.x; |
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i_start * ILP < n && i_start * ILP < chunk_size; |
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i_start += blockDim.x) { |
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// load |
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load_store(r_p, p, 0, i_start); |
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load_store(r_update, update, 0, i_start); |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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r_p[ii] = static_cast<MATH_T>(r_p[ii]) - |
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(ratio * static_cast<MATH_T>(r_update[ii])); |
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} |
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load_store(p, r_p, i_start, 0); |
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} |
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} else { |
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for (int i_start = 0; i_start < n && i_start < chunk_size; |
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i_start += blockDim.x * ILP) { |
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MATH_T r_p[ILP]; |
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MATH_T r_update[ILP]; |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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int i = i_start + threadIdx.x + ii * blockDim.x; |
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if (i < n && i < chunk_size) { |
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r_p[ii] = p[i]; |
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r_update[ii] = update[i]; |
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} |
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} |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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r_p[ii] = r_p[ii] - (ratio * r_update[ii]); |
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} |
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#pragma unroll |
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for (int ii = 0; ii < ILP; ii++) { |
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int i = i_start + threadIdx.x + ii * blockDim.x; |
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if (i < n && i < chunk_size) { |
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p[i] = r_p[ii]; |
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} |
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} |
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} |
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} |
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} |
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}; |
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void multi_tensor_lamb_cuda(int chunk_size, at::Tensor noop_flag, |
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std::vector<std::vector<at::Tensor>> tensor_lists, |
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const float lr, const float beta1, |
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const float beta2, const float epsilon, |
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const int step, const int bias_correction, |
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const float weight_decay, const int grad_averaging, |
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const int mode, at::Tensor global_grad_norm, |
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const float max_grad_norm, |
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at::optional<bool> use_nvlamb_python) { |
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using namespace at; |
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// Master weight and 32bit momentum(potentially changing) is not handled by |
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// this So we assume every tensor are all in the same type |
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bool use_nvlamb = |
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use_nvlamb_python.has_value() ? use_nvlamb_python.value() : false; |
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// Handle bias correction mode |
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float bias_correction1 = 1.0f, bias_correction2 = 1.0f; |
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if (bias_correction == 1) { |
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bias_correction1 = 1 - std::pow(beta1, step); |
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bias_correction2 = 1 - std::pow(beta2, step); |
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} |
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// Handle grad averaging mode |
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float beta3 = 1.0f; |
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if (grad_averaging == 1) beta3 = 1 - beta1; |
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std::vector<std::vector<at::Tensor>> grad_list(tensor_lists.begin(), |
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tensor_lists.begin() + 1); |
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std::vector<std::vector<at::Tensor>> param_list(tensor_lists.begin() + 1, |
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tensor_lists.begin() + 2); |
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// Compute per tensor param norm |
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auto param_norm_tuple = |
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multi_tensor_l2norm_cuda(chunk_size, noop_flag, param_list, true); |
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// We now in-place modify grad to store update before compute its norm |
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// Generally this is not a issue since people modify grad in step() method all |
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// the time We can also grab list of empty tensor to avoid this, but I'd like |
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// to save space/cpu code |
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DISPATCH_FLOAT_AND_HALF( |
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tensor_lists[0][0].scalar_type(), 0, "lamb_stage_1", |
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multi_tensor_apply<4>(BLOCK_SIZE, chunk_size, noop_flag, tensor_lists, |
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LAMBStage1Functor<scalar_t_0>(), beta1, beta2, |
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beta3, // 1-beta1 or 1 depends on averaging mode |
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bias_correction1, bias_correction2, epsilon, |
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(adamMode_t)mode, weight_decay, |
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global_grad_norm.DATA_PTR<float>(), max_grad_norm);) |
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// Compute update norms |
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auto update_norm_tuple = |
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multi_tensor_l2norm_cuda(chunk_size, noop_flag, grad_list, true); |
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std::vector<std::vector<at::Tensor>> grad_param_list( |
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tensor_lists.begin(), tensor_lists.begin() + 2); |
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DISPATCH_FLOAT_AND_HALF( |
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tensor_lists[0][0].scalar_type(), 0, "lamb_stage_2", |
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multi_tensor_apply<2>(BLOCK_SIZE, chunk_size, noop_flag, grad_param_list, |
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LAMBStage2Functor<scalar_t_0>(), |
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std::get<1>(param_norm_tuple).DATA_PTR<float>(), |
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std::get<1>(update_norm_tuple).DATA_PTR<float>(), |
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lr, weight_decay, use_nvlamb);) |
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AT_CUDA_CHECK(cudaGetLastError()); |
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}
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