mirror of https://github.com/hpcaitech/ColossalAI
177 lines
5.3 KiB
Plaintext
177 lines
5.3 KiB
Plaintext
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// modified from https://github.com/NVIDIA/apex/blob/master/csrc/multi_tensor_adam.cu
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#include <ATen/ATen.h>
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#include <ATen/AccumulateType.h>
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#include <ATen/cuda/CUDAContext.h>
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#include <ATen/cuda/Exceptions.h>
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// Another possibility:
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// #include <torch/all.h>
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#include <assert.h>
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#include "type_shim.h"
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#include "multi_tensor_apply.cuh"
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#define BLOCK_SIZE 512
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#define ILP 4
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typedef enum
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{
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ADAM_MODE_0 = 0, // L2 regularization mode
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ADAM_MODE_1 = 1 // Decoupled weight decay mode(AdamW)
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} adamMode_t;
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using MATH_T = float;
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template <typename T>
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struct AdamFunctor
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{
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__device__ __forceinline__ void operator()(
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int chunk_size,
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volatile int *noop_gmem,
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TensorListMetadata<4> &tl,
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const float beta1,
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const float beta2,
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const float beta1_correction,
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const float beta2_correction,
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const float epsilon,
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const float lr,
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adamMode_t mode,
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const float decay)
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{
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// I'd like this kernel to propagate infs/nans.
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// if(*noop_gmem == 1)
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// return;
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int tensor_loc = tl.block_to_tensor[blockIdx.x];
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// potentially use to pass in list of scalar
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// int tensor_num = tl.start_tensor_this_launch + tensor_loc;
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int chunk_idx = tl.block_to_chunk[blockIdx.x];
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int n = tl.sizes[tensor_loc];
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T *g = (T *)tl.addresses[0][tensor_loc];
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g += chunk_idx * chunk_size;
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T *p = (T *)tl.addresses[1][tensor_loc];
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p += chunk_idx * chunk_size;
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T *m = (T *)tl.addresses[2][tensor_loc];
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m += chunk_idx * chunk_size;
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T *v = (T *)tl.addresses[3][tensor_loc];
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v += chunk_idx * chunk_size;
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n -= chunk_idx * chunk_size;
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// see note in multi_tensor_scale_kernel.cu
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for (int i_start = 0;
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i_start < n && i_start < chunk_size;
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i_start += blockDim.x * ILP)
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{
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MATH_T r_g[ILP];
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MATH_T r_p[ILP];
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MATH_T r_m[ILP];
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MATH_T r_v[ILP];
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#pragma unroll
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for (int ii = 0; ii < ILP; ii++)
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{
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int i = i_start + threadIdx.x + ii * blockDim.x;
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if (i < n && i < chunk_size)
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{
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r_g[ii] = g[i];
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r_p[ii] = p[i];
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r_m[ii] = m[i];
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r_v[ii] = v[i];
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}
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else
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{
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r_g[ii] = MATH_T(0);
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r_p[ii] = MATH_T(0);
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r_m[ii] = MATH_T(0);
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r_v[ii] = MATH_T(0);
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}
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}
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#pragma unroll
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for (int ii = 0; ii < ILP; ii++)
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{
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if (mode == ADAM_MODE_0)
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{ // L2
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r_g[ii] = r_g[ii] + (decay * r_p[ii]);
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r_m[ii] = beta1 * r_m[ii] + (1 - beta1) * r_g[ii];
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r_v[ii] = beta2 * r_v[ii] + (1 - beta2) * r_g[ii] * r_g[ii];
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MATH_T next_m_unbiased = r_m[ii] / beta1_correction;
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MATH_T next_v_unbiased = r_v[ii] / beta2_correction;
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MATH_T denom = sqrtf(next_v_unbiased) + epsilon;
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MATH_T update = next_m_unbiased / denom;
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r_p[ii] = r_p[ii] - (lr * update);
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}
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else
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{ // weight decay
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r_m[ii] = beta1 * r_m[ii] + (1 - beta1) * r_g[ii];
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r_v[ii] = beta2 * r_v[ii] + (1 - beta2) * r_g[ii] * r_g[ii];
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MATH_T next_m_unbiased = r_m[ii] / beta1_correction;
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MATH_T next_v_unbiased = r_v[ii] / beta2_correction;
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MATH_T denom = sqrtf(next_v_unbiased) + epsilon;
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MATH_T update = (next_m_unbiased / denom) + (decay * r_p[ii]);
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r_p[ii] = r_p[ii] - (lr * update);
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}
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}
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#pragma unroll
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for (int ii = 0; ii < ILP; ii++)
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{
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int i = i_start + threadIdx.x + ii * blockDim.x;
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if (i < n && i < chunk_size)
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{
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p[i] = r_p[ii];
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m[i] = r_m[ii];
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v[i] = r_v[ii];
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}
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}
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}
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}
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};
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void multi_tensor_adam_cuda(
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int chunk_size,
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at::Tensor noop_flag,
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std::vector<std::vector<at::Tensor>> tensor_lists,
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const float lr,
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const float beta1,
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const float beta2,
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const float epsilon,
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const int step,
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const int mode,
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const int bias_correction,
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const float weight_decay)
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{
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using namespace at;
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// Handle bias correction mode
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float bias_correction1 = 1.0f, bias_correction2 = 1.0f;
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if (bias_correction == 1)
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{
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bias_correction1 = 1 - std::pow(beta1, step);
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bias_correction2 = 1 - std::pow(beta2, step);
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}
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// Assume single type across p,g,m1,m2 now
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DISPATCH_DOUBLE_FLOAT_AND_HALF(
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tensor_lists[0][0].scalar_type(), 0, "adam",
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multi_tensor_apply<4>(
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BLOCK_SIZE,
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chunk_size,
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noop_flag,
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tensor_lists,
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AdamFunctor<scalar_t_0>(),
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beta1,
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beta2,
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bias_correction1,
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bias_correction2,
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epsilon,
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lr,
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(adamMode_t)mode,
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weight_decay);)
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AT_CUDA_CHECK(cudaGetLastError());
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}
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